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FEDL64P168-01
Semiconductor ML64P168
GENERAL DESCRIPTION
This version: Sep. 27,1999 Previous version: Jun. 22,1999
4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver
The ML64P168 is a one-time-programmable ROM-version product, which has one-time PROM (OTP) as internal program memory. On the other hand, the ML64168 is a mask ROM-version product, which has mask ROM as internal program memory. Unlike the mask ROM-version product (ML64168), the ML64P168 cannot be supplied in the form of a chip. The ML64P168 has two operation modes, microcontroller operation mode and PROM mode. The microcontroller operation mode is used to operate the ML64P168 like a ML64168 and the PROM mode is used to program or read the PROM. The ML64P168 is a low power 4-bit microcontroller incorporating the Oki's original CPU core nX4/30. The ML64P168 provides a minimum instruction execution time of 4.3s (@700kHz). The ML64P168 contains 8160-byte program memory, 512-nibble data memory, three 4-bit input-output ports, 4-bit input port, 4-bit output port, 2-channel RC oscillation type A/D converter, LCD driver for up to 120 segments, and buzzer output port.
APPLICATION
The ML64P168 is best suited for low power, high precision thermometers and hygrometers.
FEATURES
Processing speed Minimum instruction execution time : 4.3 s @700 kHz 91.6 s @32.768 kHz
Clock generation circuit Low-speed clock : 32.768 kHz crystal oscillator High-speed clock : 700 kHz RC oscillator ( with an external resistor ) CPU clock is selectable as Low-speed clock / High-speed clock by software. Operating voltage : 1.5 V spec. / 3.0 V spec. ( selectable by mask option ) 1.45 to 1.70 V (1.5V spec.) 2.7 to 3.5 V (3.0V spec.) Operating temperature : 0 to +65C
The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date.
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FEDL64P168-01 Semiconductor ML64P168
Memory space Internal program memory Internal data memory RC oscillation type A/D converter Counter A Counter B I/O port Input-output port Input port Output port
: 8160 bytes : 512 nibbles : 2 channels Time division 2-channel method : 1 / ( 104 x 8 ) x 1 : 1 / 214 x 1
: 3 ports x 4 bits : 1 port x 4 bits : 1 port x 4 bits ( 8 out of the 34 LCD driver outputs can be used as output-only ports by mask option. ) LCD driver : 34 outputs (1) At 1/4 duty and 1/3 bias : 120 segments (max.) (2) At 1/3 duty and 1/3 bias : 93 segments (max.) (3) At 1/2 duty and 1/2 bias : 64 segments (max.) Voltage Regulator for LCD Driver (selectable by mask option) The LCD panel display is stable regardless of temporary supply voltage drop, because the voltage generated by the voltage regulator for LCD driver is supplied to the bias voltage generator as a reference voltage. LCD Operating Voltage When the voltage regulator for LCD driver is used : 3.6 V ( Duty cycle = 1/4 or 1/3 ) : 2.4 V ( Duty cycle = 1/2 ) When the voltage regulator for LCD driver is not used : 4.5 V ( Duty cycle = 1/4 or 1/3 ) : 3.0 V ( Duty cycle = 1/2 ) Buzzer driver : 1 output ( 4 output modes selectable ) Serial port : Synchronous 8-bit transfer Selectable as external clock / internal clock Selectable as MSB first / LSB first Capture circuit : 2 channels ( 32Hz, 64Hz, 128Hz, 256Hz ) Battery check circuit : 1 ( incorporated into the input-only port ) Watchdog timer Interrupt External interrupt : 2 sources Internal interrupt : 8 sources Package: 80-pin plastic QFP ( QFP80-P-1420-0.80-BK ) Product name : ML64P168 - xxxGP ( written PROM ) ML64P168 - NGP ( blanked PROM ) 80-pin plastic QFP ( QFP80-P-1414-0.65-K ) Product name : ML64P168 - xxxGA ( written PROM ) ML64P168 - NGA ( blanked PROM ) xxx indicates a code number.
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FEDL64P168-01 Semiconductor ML64P168
PROGRAM DEVELOPMENT ENVIRONMENT
Structured Assembler In Circuit Emulator Debugger : : : SASM64K EASE64168 DT64K
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FEDL64P168-01 Semiconductor ML64P168
BLOCK DIAGRAM
CPU CORE: nX-4/30
VPP
DATA BUS ( 8 )
IR DECORDER IR PCM PCL ROMR PROM 8160 Bytes
BSR MIEF HALT
TR2
TR0
TR1 PCH
C
ALU
BA
DATA BUS ( 8 )
HL
XY
TIMING CONTROLLER
SP RAM 512 Nibbles VDD1 VDD2 VDD3 C1 C2 L0 L1 to L33 CAPR VDDI P2 P3 P4 INT VDDI P1.0 P1.1 P1.2 P1.3 P2.0 P2.1 P4.3 to
ADDRESS BUS
BC INT OSC1 OSC2 XT XT RST TST1 TST2 5 2CLK TBC INT BD BD SIOP
BIAS
RSTC
LCD TST
INTC
WDT INT IN0 CS0 RS0 CRT0 RT0 IN1 CS1 RS1 RT1
P1 VDDI
ADC
P0 INT INT
P0.0 P0.1 P0.2 P0.3
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FEDL64P168-01 Semiconductor ML64P168
PIN CONFIGURATION (TOP VIEW)
RESET OSC1 66 OSC2 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 25 26 27 28 29 30 31 32 33 34 35 36 37 39 38 40 TST2 TST1 P0.3 P0.2 P0.1 P0.0 P1.3 P1.2 P1.1 P1.0 XT 69 VDD 67 XT 68
80
79
78
77
76
75
74
73
72
71
L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 P2.0 P2.1 P2.2 P2.3 P3.0 P3.1 P3.2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
70
L33 / P6.3 L32 / P6.2 L31 / P6.1 L30 / P6.0 L29 / P5.3 L28 / P5.2 L27 / P5.1 L26 / P5.0 L25 L24 L23 L22 L21 L20 L19 L18 L17 C2 C1 VDD3 VDD2 VDDI VDD1 RT1
CRT0
RS0
P3.3
P4.0
P4.1
P4.2
P4.3
RT0
CS0
( GP : QFP80-P-1420-0.80-BK ) 80-Pin Plastic QFP
CS1
RS1
BD
IN0
IN1
VPP
VSS
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FEDL64P168-01 Semiconductor ML64P168
PIN CONFIGURATION (TOP VIEW)
( continued )
L33 / P6.3 62 L32 / P6.2 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
RESET
OSC1 64
66
80
79
78
77
76
75
74
73
72
71
70
69
68
67
65
L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 P2.0 P2.1 P2.2 P2.3 P3.0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 39 24 38 40
63
OSC2
TST2
TST1
P0.3
P0.2
P0.1
P0.0
P1.3
P1.2
P1.1
P1.0
XT
L1
L0
VDD
XT
L31 / P6.1 L30 / P6.0 L29 / P5.3 L28 / P5.2 L27 / P5.1 L26 / P5.0 L25 L24 L23 L22 L21 L20 L19 L18 L17 C2 C1 VDD3 VDD2 VDDI
RS0
CRT0
RT0
RS1
P3.1
P3.2
P3.3
P4.0
P4.1
P4.2
P4.3
RT1
BD
CS0
CS1
( GA : QFP80-P-1414-0.65-K ) 80-Pin Plastic QFP
VDD1
IN0
IN1
VPP
VSS
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FEDL64P168-01 Semiconductor ML64P168
PIN DESCRIPTIONS
The basic functions of each pin of the ML64P168 is described in Table 1. A symbol with a slash ( / ) denotes a pin that has a secondary function. Refer to Table 2 for secondary functions. For Type, " - " denotes a power supply pin, " I " an input pin, "O" an output pin, and "I/O" an inputoutput pin.
Table 1 Pin No.
GP GA
Pin Descriptions ( Basic Functions )
Function
Symbol VSS VDD VDD1 VDD2
Type I O I O I I I 0V power supply Positive power supply
Description
32 67 42 44 45 43 31 46 47 69 68 66 65 71 72 70
30 65 40 42 43 41 29 44 45 67 66 64 63 69 70 68
Bias output for driving LCD (+1.5 V, +1.2 V* ) Bias output for driving LCD (+3.0 V, +2.4 V* ) Bias output for driving LCD (+4.5 V, +3.6 V* ) Positive power supply for I/O port interface Power supply (+12.5 V) for PROM writing Pins for connecting a capacitor for generating LCD driving bias Low-speed clock oscillation input and output pins. Connect to a crystal ( 32.768 kHz ). High-speed clock oscillation input and output pins. Connect to an external resistor for oscillation ( ROS ). Input pins for testing. A pull-up resistor is internally connected to these pins. System reset input pin. Setting this pin to L level puts this device into a reset state. Then, setting this pin to H level starts executing an instruction from address 0000H.
Power Supply
VDD3 VDDI VPP C1 C2 XT XT OSC1 OSC2 TST1 TST2 RESET
Oscillation
Test
Reset
*When the voltage regulator for LCD driver is used.
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FEDL64P168-01 Semiconductor ML64P168
Table 1
Function Symbol P0.0/ INT1/ CAPIN0 P0.1/ INT1/ CAPIN1 P0.2/ INT1 P0.3/ INT1/ CMP P1.0 P1.1 P1.2 P1.3 P2.0/ INT0 P2.1/ INT0 P2.2/ INT0 P2.3/ INT0 P3.0/ INT0 P3.1/ INT0 P3.2/ INT0 P3.3/ INT0/ SIN P4.0/ INT0/ SOUT P4.1/ INT0/ SPR P4.2/ INT0/ SCLK P4.3/ INT0/ MON
Pin Descriptions ( Basic Functions )
Type
( continued )
Description
Pin No.
GP GA
77 78 79 80 73 74 75 76 18 19 20 21 22 23 24 25 26 27 28 29
75 76 I 77 78 71 72 73 74 16 17 I/O 18 19 20 21 22 23 24 25 I/O 26 27 I/O O
4-bit input port ( Port 0 ) Selectable as pull-up resistor input, pull-down resistor input, or high impedance input by the port 01 control register ( P01CON ).
4-bit output port ( Port 1 ) Selectable as NMOS open drain output or CMOS output by the port 01 control register ( P01CON ). P1.0 is a high current drive output port. 4-bit input-output port ( Port 2 ) Fllowing can be specified for each bit by the port 2 control registers 0 to 3 ( P20CON to P23CON ). (1) input or output (2) pull-up/pull-down resistor input or high impedance input (3) NMOS open drain output or CMOS output
Ports
4-bit input-output port ( Port 3 ) Following can be specified for each bit by the port 3 control registers 0 to 3 ( P30CON to P33CON ). (1) input or output (2) pull-up/pull-down resistor input or high impedance input (3) NMOS open drain output or CMOS output
4-bit input-output port ( Port 4 ) Following can be specified for each bit by the port 4 control registers 0 to 3 ( P40CON to P43CON ). (1) input or output (2) pull-up/pull-down resistor input or high impedance input (3) NMOS open drain output or CMOS output
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FEDL64P168-01 Semiconductor ML64P168
Table 1
Function Buzzer Symbol BD RT0 CRT0 RS0 CS0 A/D Converter IN0 RT1 RS1 CS1 IN1
Pin Descriptions ( Basic Functions )
Type O O O O O I O O O I
( continued )
Description
Pin No.
GP GA
30 33 34 35 36 37 41 40 39 38
28 31 32 33 34 35 39 38 37 36
Output pin for the buzzer driver. Resistance temperature sensor connection pin ( for channel 0 ) Resistance/capacitance temperature sensor connection pin ( for channel 0 ) Reference resistor connection pin ( for channel 0 ) Reference capacitor connection pin ( for channel 0 ) Input pin for RC oscillator circuit ( for channel 0 ) Resistance temperature sensor connection pin ( for channel 1 ) Reference resistor connection pin ( for channel 1 ) Reference capacitor connection pin ( for channel 1 ) Input pin for RC oscillator circuit ( for channel 1 )
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FEDL64P168-01 Semiconductor ML64P168
Table 1
Function Symbol L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 LCD Driver L16 L17 L18 L19 L20 L21 L22 L23 L24 L25 L26 / P5.0 L27 / P5.1 L28 / P5.2 L29 / P5.3 L30 / P6.0 L31 / P6.1 L32 / P6.2 L33 / P6.3
Pin Descriptions ( Basic Functions )
Type O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O
( continued )
Description
Pin No.
GP GA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
79 80 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62
LCD segment and common signals output pins.
LCD segment and common signals output pins. These pins can be configured to be output ports by a mask option.
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FEDL64P168-01 Semiconductor ML64P168
Table 2
Function Symbol P2.0/ INT0 P2.1/ INT0 P2.2/ INT0 P2.3/ INT0 P3.0/ INT0 P3.1/ INT0 P3.2/ INT0 P3.3/ INT0 P4.0/ INT0 P4.1/ INT0 P4.2/ INT0 P4.3/ INT0 P0.0/ INT1 P0.1/ INT1 P0.2/ INT1 P0.3/ INT1 P0.0/ CAPIN0 P0.1/ CAPIN1 P3.3/ SIN P4.0/ SOUT P4.1/ SPR P4.2/ SCLK Pin No.
GP GA
Pin Descriptions ( Secondary Functions )
Type Description Secondary functions of P2.0 to P2.3, P3.0 to P3.3, and P4.0 to P4.3: Level-triggered external 0 interrupt input pins. The change of input signal level causes an interrupt to occur.
18 19 20 21 22 23 24 25 26 27 28 29 77 78 79 80 77 78 25 26 27 28
16 17 I 18 19 20 21 I 22 23 24 25 I 26 27 75 76 I 77 78 75 I 76 23 24 25 26 I O O I/O
External Interrupt
Secondary functions of P0.0 to P0.3: Level-triggered external 1 interrupt input pins. The change of input signal level causes an interrupt to occur.
Capture trigger
Serial port
Secondary functions of P0.0: This pin is assigned the capture circuit trigger input pin of CAPR0 function . Secondary functions of P0.1: This pin is assigned the capture circuit trigger input pin of CAPR1 function . Secondary functions of P3.3: This pin is assigned the data input of a serial port. Secondary functions of P4.0: This pin is assigned the data output of a serial port. Secondary functions of P4.1: This pin is assigned the ready output of a serial port. Secondary functions of P4.2: This pin is assigned the clock input-output of a serial port.
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FEDL64P168-01 Semiconductor ML64P168
Table 2
Function RC Oscillation Monitor Battery Check Symbol P4.3/ MON P0.3/ CMP
Pin Descriptions ( Secondary Functions )
Pin No.
GP GA
( continued )
Type
Description Secondary functions of P4.3: This pin is a monitor output of the RC oscillation clock for an A/D converter and a 700kHz RC oscillation clock for a system clock. Secondary functions of P0.3: This pin is an analog comparator input pin for battery check circuit.
29
27
O
80
78
I
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FEDL64P168-01 Semiconductor ML64P168
MEMORY MAPS
Program Memory ( PROM )
Test program area 1FFFH 1FE0H 32 bytes
Contents of interrupt area 8160 bytes 003BH 0038H 0035H 0032H 002FH 002CH 0029H 0026H 0023H 0020H Watchdog interrupt External 0 interrupt Serial port interrupt External 1 interrupt A/D converter interrupt 256Hz interrupt 32Hz interrupt 16Hz interrupt 1Hz interrupt 0.1Hz interrupt
003EH Interrupt area 0020H CZP area 0010H
0000H
Start address 8 bits
Program Memory Map Address 0000H is the instruction execution start address by the system reset. The CZP area from address 0010H to address 001FH is the start address for the CZP subroutine of 1byte call instruction. The start address of interrupt subroutine is assigned to the interrupt address from address 0020H to 003DH. The user area has 8160 bytes of address 0000H to 1FDFH. No program can be stored in the test program area.
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FEDL64P168-01 Semiconductor ML64P168
Data Memory The data memory area consists of 8 banks and each bank has 256 nibbles ( 256 x 4 bits ). The data RAM is assigned to BANK 6, BANK 7 and peripheral ports are assigned to BANK 0.
7FFH 780H 700H 6FFH BANK7 Data RAM area ( 256 nibbles ) BANK6 Data RAM area ( 256 nibbles ) 512 nibbles Data / Stack area ( 128 nibbles )
600H
07FH
Contents of 000H to 07FH
Inaccessible area
SFR area
100H 0FFH 080H 07FH 000H
Unused area BANK0 000H 4 bits
Data Memory Map Half the BANK 7 of Data RAM area ( 128 nibbles ) is shared by the stack area. The stack is a memory starting from address 7FFH toward the low-order addresses where 4 nibbles are used by Subroutine Call Instruction and 8 nibbles are used by an interrupt. The addresses 080H to 0FFH of BANK 0 are not assigned as the data memory, so access to these addresses has no effect. Moreover, it is impossible to access BANK 1 to BANK 5.
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FEDL64P168-01 Semiconductor ML64P168
ABSOLUTE MAXIMUM RATINGS ( 1.5 V Spec. )
(VSS = 0V) Parameter Power supply voltage 1 Power supply voltage 2 Power supply voltage 3 Power supply voltage 4 Power supply voltage 5 Input voltage 1 Input voltage 2 Output voltage 1 Output voltage 2 Output voltage 3 Output voltage 4 Output voltage 5 Power Dissipation Storage temperature Symbol VDD1 VDD2 VDD3 VDDI VDD VIN1 VIN2 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 PD TSTG Condition Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C VDD input, Ta = 25C VDDI input, Ta = 25C VDD1 output, Ta = 25C VDD2 output, Ta = 25C VDD3 output, Ta = 25C VDD output, Ta = 25C VDDI output, Ta = 25C Ta = 0 to + 65C QFP80-P-1420-0.80-BK Ta = 0 to + 65C QFP80-P-1414-0.65-K Rating -0.3 to + 2.0 -0.3 to + 4.0 -0.3 to + 5.5 -0.3 to + 5.5 -0.3 to + 2.0 -0.3 to VDD+ 0.3 -0.3 to VDDI+ 0.3 -0.3 to VDD1+ 0.3 -0.3 to VDD2+ 0.3 -0.3 to VDD3+ 0.3 -0.3 to VDD+ 0.3 -0.3 to VDD+ 0.3 381 334 -55 to + 150 Unit V V V V V V V V V V V V mW mW C
RECOMMENDED OPERATING CONDITIONS ( 1.5V Spec. )
(VSS = 0V) Parameter Operating Temperature* Operating Voltage* External 700kHz RC Oscillator Resistance* Crystal oscillation frequency* Symbol Top VDD,VDD1 VDDI ROS fXT Condition Rating 0 to + 65 1.45 to 1.70 2.70 to 5.25 60 to 200 30 to 35 Unit C V V k kHz
* : At Non-regulated LCD driver. In case of select a voltage regulated LCD driver, see P.37/51.
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FEDL64P168-01 Semiconductor ML64P168
ELECTRICAL CHARACTERISTICS ( 1.5 V Spec. )
DC Characteristics ( 1.5 V Spec. )
(VSS=0V, VDD1=VDD=1.5V, VDDI=2.7V, Ta=0 to +65C unless otherwise specified ) Parameter VDD2 Voltage* Symbol VDD2 Condition Ca, Cb, C12=0.1F +100% -50% +100% -50% Min. 2.8 Typ. 3.0 Max. 3.2 Unit V Measuring Circuit
VDD3 Voltage* Crystal Oscillation Start Voltage Crystal Oscillation Hold Voltage Crystal Oscillation Stop Detection Time Internal Crystal Oscillator Capacitance External Crystal Oscillator Capacitance Internal Crystal Oscillator Capacitance Internal 700kHz RC Oscillator Capacitance 700kHz RC Oscillation Frequency POR Generation Voltage POR Non-generation Voltage Battery Check Reference Voltage VRB Temperature Variation
VDD3 VSTA VHOLD TSTOP CG CGEX CD COS fOSC VPOR1 VPOR2 VRB VRB
Ca, Cb, C12=0.1F Oscillation start time: within 5 seconds
4.3 1.47 1.40 0.1 10 10 10 8 80 0 1.4 0.50
4.5 15 15 12 280 0.60 -2
4.7 1000 20 30 20 16 350 0.4 1.5 0.70 -
V V V ms pF pF pF pF kHz V V V 2 mV/C 1
When external CG used External resistor ROS=160k VDD = 1.45 to 1.70V When VDD is between VPOR1 and 1.5V No POR when VDD is between VPOR2 and 1.5V Ta = 25C
-
-
Notes:
1."POR" denotes Power On Reset. 2."TSTOP" indicates that if the crystal oscillator stops over the value of TSTOP, the system reset occurs.
* : At Non-regulated LCD driver. In case of select a voltage regulated LCD driver, see P.37/51.
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FEDL64P168-01 Semiconductor ML64P168
DC Characteristics ( 1.5V Spec. )
( Continued )
(VSS=0V, VDD1=VDD=1.5V, VDDI=2.7V, Ta=0 to +65C unless otherwise specified )
Parameter Supply current 1* Supply current 2* Supply current 3 Supply current 4
Symbol IDD1 IDD2 IDD3 IDD4
Condition CPU in halt state (700kHz RC oscillation stop) CPU in operating state (700kHz RC oscillation stop) CPU in operating state (700kHz RC oscillation in operation) Serial transfer, fSCK=300kHz, CPU in operating state (700kHz RC oscillation stop) CPU in halt state RT0=10k (700kHz RC oscillation stop) RC oscillation for A/D converter is in operating RT0=2k state Battery check circuit in operating state, CPU in operating state (700kHz RC oscillation stop)
Min. -
Typ. 2 15 200 60 150 600
Max . 5 30 300 100 230 900
Unit
Measuring Circuit
A A A A
1
A A A
Supply current 5
IDD5
Supply current 6
IDD6
-
25
125
* : At Non-regulated LCD driver. In case of select a voltage regulated LCD driver, see P.37/51.
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FEDL64P168-01 Semiconductor ML64P168
DC Characteristics (1.5 V Spec. )
( Continued )
(VSS=0V, VDD1=VDD=1.5V, VDD2=3.0V, VDD3=4.5V, VDDI=2.7V, Ta=0 to +65C unless otherwise specified ) Parameter Symbol IOH1 Output current 1 ( P1.0 ) IOL1 IOH1S IOL1S Output current 2 ( P1.1 to P1.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) Output current 3 ( BD ) Output current 4 ( RT0, RT1, RS0, RS1, CRT0, CS0, CS1 ) Output current 5 ( When the pins L26 to L33 are configured as output ports ) Output current 6 ( OSC2 ) IOH2 IOL2 IOH2S IOL2S IOH3 IOL3 IOH4 IOL4 IOH5 IOL5 IOH5S IOL5S IOH6 IOL6 IOH7 IOMH7 Output current 7 ( L0 to L33 ) IOMH7S IOML7 IOML7S IOL7 Output Leakage Current ( P1.0 to P1.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) (RT0, RT1, RS0, RS1, CRT0, CS0, CS1 ) IOOH Condition VOH1 = VDDI - 0.5V VOL1 = 0.5V VDDI = 5.0V, VOH1S = VDDI - 0.5V VDDI = 5.0V, VOL1S = 0.5V VOH2 = VDDI - 0.5V VOL2 = 0.5V VDDI = 5.0V, VOH2S = VDDI - 0.5V VDDI= 5.0V, VOL2S = 0.5V VOH3 = VDD - 0.7V VOL3 = 0.7V VOH4 = VDD - 0.1V VOL4 = 0.1V VOH5 = VDDI - 0.5V VOL5 = 0.5V VDDI = 5V, VOH5S = VDDI - 0.5V VDDI = 5V, VOL5S = 0.5V VOH6 = VDD - 0.5V VOL6 = 0.5V VOH7 = VDD3 - 0.2V (VDD3 level) Min. -6.0 2 -9 4 -6.0 0.7 -9 1 -1.8 0.2 -1.1 0.3 -1.5 0.15 -2.0 0.2 -2.1 0.15 4 4 4 Typ. -1.7 5 -3.0 8 -2.0 2.0 -3 3 -0.6 2 -0.6 0.6 -0.8 1.0 -1.5 3.0 -0.7 0.7 Max. -0.7 20 -1 25 -0.7 6.0 -1 9 -0.1 4 -0.2 1.1 -0.15 4 -0.2 5.0 -0.15 2.1 -4 -4 -4 0.3 mA 2 Unit Measuring Circuit
VOMH7 = VDD2 + 0.2V (VDD2 level) VOMH7S = VDD2 - 0.2V (VDD2 level) VOML7 = VDD1 + 0.2V (VDD1 level) VOML7S = VDD1 - 0.2V (VDD1 level) VOL7 = VSS + 0.2V VOH = VDD (VSS level)
A
-
IOOL
VOL = VSS
-0.3
-
-
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FEDL64P168-01 Semiconductor ML64P168
DC Characteristics (1.5 V Spec. )
( Continued )
( VSS=0V, VDD1=VDD=1.5V, VDD2=3.0V, VDD3=4.5V, VDDI=2.7V, Ta=0 to +65C unless otherwise specified ) Parameter Symbol IIH1 Input Current 1 ( P0.0 to P0.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) IIL1 IIH1S IIL1S IIH1Z IIL1Z IIH2 Input Current 2 ( IN0, IN1 ) IIH2Z IIL2Z IIL3 Input Current 3 ( OSC1 ) Input Current 4 ( RESET, TST1, TST2 ) Input Voltage 1 ( P0.0 to P0.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) Input Voltage 2 ( IN0, IN1, OSC1 ) Input Voltage 3 ( RESET, TST1, TST2 ) IIH3Z IIL3Z IIH4 IIL4 VIH1 VIL1 VIH1S VIL1S VIH2 VIL2 VIH3 VIL3 VDDI = 5.0V VDDI = 5.0V Condition VIH1 = VDDI ( when pulled down ) VIL1 = VSS ( when pulled up ) VIH1 = VDDI = 5V ( when pulled down ) VIL1 = VSS, VDDI = 5V ( when pulled up ) VIH1 = VDDI ( in a high impedance ) VIL1 = VSS (in a high impedance ) VIH2 = VDD ( when pulled down ) VIH2 = VDD ( in a high impedance ) VIL2 = VSS ( in a high impedance ) VIL3 = VSS ( when pulled up ) VIH3 = VDD ( in a high impedance ) VIL3 = VSS ( in a high impedance ) VIH = VDD VIL4 = VSS Min. 30 -300 80 -800 0 -1 2 0 -1 -60 0 -1 0 -1.0 1.2 0 4 0 1.2 0 1.2 0 Typ. 90 -90 250 -250 8 -18 -0.3 Max. 300 -30 800 -80 1 0 60 1 0 -5 1 0 1 -0.05 1.5 0.3 5 1 1.5 0.3 1.5 0.3 V 4 mA Unit Measuring Circuit
A
3
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FEDL64P168-01 Semiconductor ML64P168
DC Characteristics (1.5 V Spec. )
( Continued )
(VSS=0V, VDD1=VDD=1.5V, VDD2=3.0V, VDD3=4.5V, VDDI=2.7V, Ta=0 to +65C unless otherwise specified ) Parameter Hysteresis Width ( P0.0 to P0.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) Hysteresis Width ( RESET, TST1, TST2 ) Input Pin Capacitance ( P0.0 to P0.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) Symbol VT1 VT1S VDDI = 5.0V Condition Min. 0.05 0.25 Typ. 0.1 1.0 Max. 0.3 1.5 Unit Measuring Circuit
V
4
VT2
-
0.05
0.1
0.3
CIN
-
-
-
5
pF
1
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FEDL64P168-01 Semiconductor ML64P168
Measuring circuit 1
RT0 OSC1 ROS OSC2 RT0
CS0 CS0
RI0 IN0 XT XT C1 C2
32.768kHz Crystal
C12
VSS
VDD A
VDD1 CA V
VDD2 CB V
VDD3 CC V
VDDI CA,CB,CC,C12 ROS RT0 CS0 RI0 : : : : : 0.1F 160k 10k/2k 820pF 10k
Measuring circuit 2
OUTPUT
VIH
*2
*1
VIL
INPUT
A
VSS
VDD1
VDD2
VDD3
VDD
VDDI
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FEDL64P168-01 Semiconductor ML64P168
Measuring circuit 3
*3 INPUT
A
VSS
VDD1
VDD2
VDD3
VDD
VDDI
Measuring circuit 4
VIH INPUT
OUTPUT VDD1 VDD2 VDD3 VDD VDDI
*3
VIL
VSS
*1 Input logic circuit to determine the specified measuring conditions. *2 Measured at the specified output pins. *3 Measured at the specified input pins.
OUTPUT Waveform Monitoring
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FEDL64P168-01 Semiconductor ML64P168
A/D Converter Characteristics (1.5 V Spec. )
( VSS=0V, VDD1=VDD=1.5V, VDDI=2.7V, Ta=0 to +65C unless otherwise specified ) MeasurCondition Min. Typ. Max. Unit ing Circuit
Parameter
Symbol
Resistor for Oscillation Input Current Limiting Resistor Oscillation Frequency
RS0, RS1, RT0, RT0-1, RT1 RI0, RI1 fOSC1 fOSC2 fOSC3 Kf1 Kf2 Kf3
CS0, CT0, CS1 740pF
2
-
-
k
Resistor for oscillation =2 k Resistor for oscillation =10 k Resistor for oscillation =200 k RT0, RT0-1, RT1 = 2 k RT0, RT0-1, RT1 = 10 k RT0, RT0-1, RT1 = 200 k
1 165 41.8 2.55 3.89
0.990 0.0561
10 221 52.2 3.04 4.18
1.000 0.0584
256 60.6 3.53 4.35
1.010 0.0637
k kHz kHz kHz -
5
RS*RT Oscillation Frequency Ratio (*)
* Kfx is the ratio of the oscillation frequency by a sensor resistor to the oscillation frequency by a reference resistor in the same condition.
Kfx= fOSCX(RT0 - CS0 Oscillation) fOSCX(RS0 - CS0 Oscillation) , (X = 1, 2, 3) fOSCX(RT0-1 - CS0 Oscillation) fOSCX(RS0 - CS0 Oscillation) , fOSCX(RT1 - CS1 Oscillation) fOSCX(RS1 - CS1 Oscillation)
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FEDL64P168-01 Semiconductor ML64P168
Measuring circuit 5
(CROSC1) RT1 RI1 RS1 CS1 RI0 CS0 (CROSC0) RT0-1 CT0 RT0 RS0
Oscillation Mode Designation
RT1 RS1 CS1 IN1 RESET TST1 TST2 P0.0 P0.1 P0.2 P0.3 VSS
IN0 CS0 RS0
CRT0 RT0 P4.3 Frequency Measurement (fOSCX) RT0,RT0-1,RT1=2k/10k/200k RS0,RS1=10k RI0,RI1=10k CS0,CT0,CS1=820pF
D.U.T
VDD
VDDI
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FEDL64P168-01 Semiconductor ML64P168
AC Characteristics (1.5 V Spec. )
( Serial Interface )
( VSS=0v, VDD=1.5V , VDDI=2.7V, Ta=0 to +65C unless otherwise specified
)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
SCLK Input Fall Time SCLK Input Rise Time SCLK Input "L" Level Pulse Width SCLK Input "H" Level Pulse Width SCLK Input Cycle Time SCLK Output Cycle Time SCLK Output Cycle Time SOUT Output Delay Time SIN Input Setup Time SIN Input Hold Time
tf tr tCWL tCWH tCYC tCYC1(O) tCYC2(O) tDDR tDS tDH
CPU is operating at 32.768kHz CPU is operating at 700kHz -
0.8 0.8 2.0 0.5 0.8
15 15 30.5 1.43 -
50 50 0.4 -
ns ns s s s s s s s s
Synchronous communication timing ( "H" level = 4.0V, "L" level = 1.0V ) tCYC
SCLK (P4.2) tr tDDR SOUT (P4.0) tDS SIN (P3.3) tDH tDS 5V tCWH tf tDDR 5V tCWL 5V
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FEDL64P168-01 Semiconductor ML64P168
ABSOLUTE MAXIMUM RATINGS (3.0 V Spec. )
(VSS = 0V) Parameter Power supply voltage 1 Power supply voltage 2 Power supply voltage 3 Power supply voltage 4 Power supply voltage 5 Input voltage 1 Input voltage 2 Output voltage 1 Output voltage 2 Output voltage 3 Output voltage 4 Output voltage 5 Power Dissipation Storage temperature Symbol VDD1 VDD2 VDD3 VDDI VDD VIN1 VIN2 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 PD TSTG Condition Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C VDD input, Ta = 25C VDDI input, Ta = 25C VDD1 output, Ta = 25C VDD2 output, Ta = 25C VDD3output, Ta = 25C VDD output, Ta = 25C VDDI output, Ta = 25C Ta = 0 to + 65C QFP80-P-1420-0.80-BK Ta = 0 to + 65C QFP80-P-1414-0.65-K Rating -0.3 to + 2.0 -0.3 to + 4.0 -0.3 to + 5.5 -0.3 to + 5.5 -0.3 to + 4.0 -0.3 to VDD + 0.3 -0.3 to VDDI + 0.3 -0.3 to VDD2+ 0.3 -0.3 to VDD3+ 0.3 -0.3 to VDD+ 0.3 -0.3 to VDD+ 0.3 -0.3 to VDD+ 0.3 381 334 -55 to + 150 Unit V V V V V V V V V V V V mW mW C
RECOMMENDED OPERATING CONDITIONS ( 3.0V Spec. )
(VSS = 0V) Parameter Operating Temperature*1 Operating Voltage*1 External 700kHz RC oscillator Resistance*1 Crystal oscillation frequency*1 Symbol Top VDD VDDI ROS fXT Condition Rating 0 to + 65 2.7 to 3.5 VDD to 5.25 60 to 200 30 to 66 Unit C V V k kHz
*1: At Non-regulated LCD driver. In case of select a voltage regulated LCD driver, see P.37/51.
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FEDL64P168-01 Semiconductor ML64P168
ELECTRICAL CHARACTERISTICS ( 3.0V Spec. )
DC Characteristics ( 3.0V Spec. )
(VSS=0V, VDD2=VDDI=VDD=3.0V, Ta=0 to +65C unless otherwise specified ) Parameter VDD1 Voltage* Symbol VDD1 Condition Ca, Cb, C12=0.1F +100% -50% +100% -50% Min. 1.3 Typ. 1.5 Max. 1.7 Unit V Measuring Circuit
VDD3 Voltage* Crystal Oscillation Start Voltage Crystal Oscillation Hold Voltage Crystal Oscillation Stop Detection Time Internal Crystal Oscillator Capacitance External Crystal Oscillator Capacitance Internal Crystal Oscillator Capacitance Internal 700kHz RC Oscillator Capacitance 700kHz RC Oscillation Frequency POR Generation Voltage POR Non-generation Voltage Battery Check Reference Voltage VRB Temperature Variation
VDD3 VSTA VHOLD TSTOP CG CGEX CD COS fOSC VPOR1 VPOR2 VRB VRB
Ca, Cb, C12=0.1F Oscillation start time: within 5 seconds
4.3 2.7 2.7 0.1 10 10 10 8 600 0 2.7 0.50 -
4.5 15 15 12 700 0.60 -2
4.7 1000 20 30 20 16 1000 0.7 3 0.70 -
V V V ms pF pF pF pF kHz V V V 2 mV/C 1
When external CG used External resistor ROS=60k VDD = 2.7 to 3.5V When VDD is between VPOR1 and 3.0V No POR when VDD is between VPOR2 and 3.0V Ta = 25C
Notes:
1."POR" denotes Power On Reset. 2."TSTOP" indicates that if the crystal oscillator stops over the value of TSTOP, the system reset occurs.
*: At Non-regulated LCD driver. In case of select a voltage regulated LCD driver, see P.37/51.
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FEDL64P168-01 Semiconductor ML64P168
DC Characteristics ( 3.0V Spec. )
( Continued )
(VSS=0V, VDD2=VDDI=VDD=3.0V, Ta=0 to +65C unless otherwise specified )
Parameter Supply current 1* Supply current 2* Supply current 3 Supply current 4
Symbol IDD1 IDD2 IDD3 IDD4
Condition CPU in halt state (700kHz RC oscillation stop) CPU in operating state (700kHz RC oscillation stop) CPU in operating state (700kHz RC oscillation in operation) Serial transfer, fSCK=300kHz, CPU in operating state (700kHz RC oscillation stop) CPU in halt state (700kHz RC oscillation stop) RT0=10k RC oscillation for A/D converter is in operating state RT0=2k Battery check circuit in operating state, CPU in operating state (700kHz RC oscillation stop)
Min. -
Typ. 7 35 800 40 300 1200 55
Max. 12 50 1400 70 450 1800 150
Unit
Measuring Circuit
A A A A A A A
1
Supply current 5
IDD5
Supply current 6
IDD6
*: At Non-regulated LCD driver. In case of select a voltage regulated LCD driver, see P.37/51.
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FEDL64P168-01 Semiconductor ML64P168
DC Characteristics (3.0 V Spec. )
( Continued )
( VSS=0V, VDD1=1.5V, VDD2=VDDI=VDD=3.0V, VDD3=4.5V, Ta=0 to +65C unless otherwise specified ) Parameter Symbol IOH1 Output current 1 ( P1.0 ) IOL1 IOH1S IOL1S Output current 2 ( P1.1 to P1.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) Output current 3 ( BD ) Output current 4 ( RT0, RT1, RS0, RS1, CRT0, CS0, CS1 ) Output current 5 ( When the pins L26 to L33 are configured as output ports ) Output current 6 ( OSC2 ) IOH2 IOL2 IOH2S IOL2S IOH3 IOL3 IOH4 IOL4 IOH5 IOL5 IOH5S IOL5S IOH6 IOL6 IOH7 IOMH7 Output current 7 ( L0 to L33 ) IOMH7S IOML7 IOML7S IOL7 Output Leakage Current ( P1.0 to P1.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) (RT0, RT1, RS0, RS1, CRT0, CS0, CS1 ) IOOH Condition VOH1 = VDDI - 0.5V VOL1 = 0.5V VDDI = 5.0V, VOH1S = VDDI - 0.5V VDDI = 5.0V, VOL1S = 0.5V VOH2 = VDDI - 0.5V VOL2 = 0.5V VDDI = 5.0V, VOH2S = VDDI - 0.5V VDDI = 5.0V, VOL2S = 0.5V VOH3 = VDD - 0.7V VOL3 = 0.7V VOH4 = VDD - 0.1V VOL4 = 0.1V VOH5 = VDDI - 0.5V VOL5 = 0.5V VDDI = 5V, VOH5S = VDDI - 0.5V VDDI = 5V, VOL5S = 0.5V VOH6 = VDD - 0.5V VOL6 = 0.5V VOH7 = VDD3 - 0.2V (VDD3 level) Min. -6.0 2 -9 4 -6.0 0.7 -9 1 -6.0 0.7 -2.5 0.7 -1.5 0.15 -2.0 0.2 -4.0 0.7 4 4 4 Typ. -1.7 5 -3 8 -2.0 2.0 -3 3 -2.0 6.0 -0.8 1.3 -0.8 2.0 -1.5 3.0 -0.8 3.0 Max. -0.7 20 -1 25 -0.7 6.0 -1 9 -0.7 10.0 -0.3 2.5 -0.15 4.0 -0.2 5.0 -0.3 6.0 -4 -4 -4 0.3 mA 2 Unit Measuring Circuit
VOMH7 = VDD2 + 0.2V (VDD2 level) VOMH7S = VDD2 - 0.2V (VDD2 level) VOML7 = VDD1 + 0.2V (VDD1 level) VOML7S = VDD1 - 0.2V (VDD1 level) VOL7 = VSS + 0.2V VOH = VDD (VSS level)
A
-
IOOL
VOL = VSS
-0.3
-
-
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FEDL64P168-01 Semiconductor ML64P168
DC Characteristics (3.0 V Spec. )
( Continued )
(VSS=0V, VDD1=1.5V, VDD2=VDDI=VDD=3.0V, VDD3=4.5V, Ta=0 to +65C unless otherwise specified ) Parameter Symbol IIH1 Input Current 1 ( P0.0 to P0.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) IIL1 IIH1S IIL1S IIH1Z IIL1Z IIH2 Input Current 2 ( IN0, IN1 ) IIH2Z IIL2Z IIL3 Input Current 3 ( OSC1 ) Input Current 4 ( RESET, TST1, TST2 ) Input Voltage 1 ( P0.0 to P0.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) Input Voltage 2 ( IN0, IN1, OSC1 ) Input Voltage 3 ( RESET, TST1, TST2 ) IIH3Z IIL3Z IIH4 IIL4 VIH1 VIL1 VIH1S VIL1S VIH2 VIL2 VIH3 VIL3 VDDI = 5.0V VDDI = 5.0V Condition VIH1 = VDDI ( when pulled down ) VIL1 = VSS ( when pulled up ) VIH1 = VDDI = 5V ( when pulled down ) VIL1 = VSS, VDD = 5V ( when pulled up ) VIH1 = VDDI ( in a high impedance ) VIL1 = VSS (in a high impedance ) VIH2 = VDD ( when pulled down ) VIH2 = VDD ( in a high impedance ) VIL2 = VSS ( in a high impedance ) VIL3 = VSS ( when pulled up ) VIH3 = VDD ( in a high impedance ) VIL3 = VSS ( in a high impedance ) VIH4 = VDD VIL4 = VSS Min. 30 -300 80 -800 0 -1 30 0 -1 -300 0 -1 0 -3.00 2.4 0 4 0 2.4 0 2.4 0 Typ. 90 -90 250 -250 90 -110 -1.50 Max. 300 -30 800 -80 1 0 300 1 0 -10 1 0 1 -0.75 3.0 0.6 5 1 3.0 0.6 3.0 0.6 V 4 mA Unit Measuring Circuit
A
3
30/51
FEDL64P168-01 Semiconductor ML64P168
DC Characteristics (3.0 V Spec. )
( Continued )
(VSS=0V, VDD1=1.5V, VDD2=VDDI=VDD=3.0V, VDD3=4.5V, Ta=0 to +65C unless otherwise specified) Parameter Hysteresis Width ( P0.0 to P0.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) Hysteresis Width ( RESET, TST1, TST2 ) Input Pin Capacitance ( P0.0 to P0.3 ) ( P2.0 to P2.3 ) ( P3.0 to P3.3 ) ( P4.0 to P4.3 ) Symbol VT1 VT1S VDDI=5.0V Condition Min. 0.2 0.25 Typ. 0.5 1.00 Max. 1.0 1.50 Unit Measuring Circuit
V
4
VT2
-
0.2
0.5
1.0
CIN
-
-
-
5
pF
1
31/51
FEDL64P168-01 Semiconductor ML64P168
Measuring circuit 1
RT0 OSC1 ROS OSC2 RT0
CS0 CS0
RI0 IN0 XT XT C1 C2
32.768kHz Crystal
C12
VSS
VDD A
VDD1 CA V
VDD2 CB V
VDD3 CC V
VDDI CA,CB,CC,C12 ROS RT0 CS0 RI0 : : : : : 0.1F 60k 10k/2k 820pF 10k
Measuring circuit 2
OUTPUT
VIH
*2
*1
VIL
INPUT
A
VSS
VDD1
VDD2
VDD3
VDD
VDDI
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FEDL64P168-01 Semiconductor ML64P168
Measuring circuit 3
*3 INPUT
A
VSS
VDD1
VDD2
VDD3
VDD
VDDI
Measuring circuit 4
VIH INPUT
OUTPUT VDD1 VDD2 VDD3 VDD VDDI
*3
VIL
VSS
*1 Input logic circuit to determine the specified measuring conditions. *2 Measured at the specified output pins. *3 Measured at the specified input pins.
OUTPUT Waveform Monitoring
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FEDL64P168-01 Semiconductor ML64P168
A/D Converter Characteristics (3.0 V Spec. )
( VSS=0V, VDDI=VDD=3.0V, Ta=0 to +65C unless otherwise specified) MeasurCondition Min. Typ. Max. Unit ing Circuit
Parameter
Symbol
Resistor for Oscillation Input Current Limiting Resistor Oscillation Frequency
RS0, RS1, RT0, RT0-1, RT1 RI0, RI1 fOSC1 fOSC2 fOSC3 Kf1 Kf2 Kf3
CS0, CT0, CS1 740pF
1
-
-
k
Resistor for oscillation =2 k Resistor for oscillation =10 k Resistor for oscillation =200 k RT0, RT0-1, RT1 = 2 k RT0, RT0-1, RT1 = 10 k RT0, RT0-1, RT1 = 200 k
1 200 46.5 2.79 4.272
0.990 0.0573
10 239 55.4 3.32 4.380
1.000 0.0616
277 64.3 3.85 4.490
1.010 0.0659
k kHz kHz kHz -
5
RS*RT Oscillation Frequency Ratio(*)
* Kfx is the ratio of the oscillation frequency by a sensor resistor to the oscillation frequency by a reference resistor in the same condition.
Kfx= fOSCx(RT0 - CS0 Oscillation) fOSCx(RS0 - CS0 Oscillation) (x=1, 2, 3) , fOSCx(RT0-1 - CS0 Oscillation) fOSCx(RS0 - CS0 Oscillation) , fOSCx(RT1 - CS1 Oscillation) fOSCx(RS1 - CS1 Oscillation)
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FEDL64P168-01 Semiconductor ML64P168
Measuring circuit 5
(CROSC1) RT1 RI1 RS1 CS1 RI0 CS0 (CROSC0) RT0-1 CT0 RT0 RS0
Oscillation Mode Designation
RT1 RS1 CS1 IN1 RESET TST1 TST2 P0.0 P0.1 P0.2 P0.3 VSS
IN0 CS0 RS0
CRT0 RT0 P4.3 Frequency Measurement (fOSCX) RT0,RT0-1,RT1=2k/10k/200k RS0,RS1=10k RI0,RI1=10k CS0,CT0,CS1=820pF
D.U.T
VDD
VDDI
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FEDL64P168-01 Semiconductor ML64P168
AC Characteristics ( 3.0V Spec. )
( Serial Interface )
( VSS=0V, VDD2=VDD=3.0V, VDDI=5.0V , Ta=0 to +65C unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
SCLK Input Fall Time SCLK Input Rise Time SCLK Input "L" Level Pulse Width SCLK Input "H" Level Pulse Width SCLK Input Cycle Time SCLK Output Cycle Time SCLK Output Cycle Time SOUT Output Delay Time SIN Input Setup Time SIN Input Hold Time
tf tr tCWL tCWH tCYC tCYC1(O) tCYC2(O) tDDR tDS tDH
CPU is operating at 32.768kHz CPU is operating at 700kHz -
0.8 0.8 2.0 0.5 0.8
15 15 30.5 1.43 -
50 50 0.4 -
ns ns s s s s s s s s
Synchronous communication timing ( "H" level = 4.0V, "L" level = 1.0V ) tCYC
SCLK (P4.2) tr tDDR SOUT (P4.0) tDS SIN (P3.3) tDH tDS 5V tCWH tf tDDR 5V tCWL 5V
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FEDL64P168-01 Semiconductor ML64P168
RECOMMENDED OPERATING CONDITIONS
( When Voltage Regulator for LCD Driver Used )
(VSS = 0V) Parameter Operating Temperature Operating Voltage Crystal oscillation frequency Symbol Top VDD fXT Condition Rating 0 to + 65 2.7 to 3.5 30 to 66 Unit C V kHz
ELECTRICAL CHARACTERISTICS
( When Voltage Regulator for LCD Driver Used ) DC Characteristics
(VSS=0V, VDD=3.0V, Ta=0 to +65C unless otherwise specified ) Parameter Symbol VDD1 VDD1 VDD2 VDD3 IDD1 Condition VDD=2.7 to 3.5, Ta=25C VDD=2.7 to 3.5 VDD=2.7 to 3.5 VDD=1.5V , CPU in halt state VDD=3.0V, CPU in halt state VDD=1.5V, CPU in operating state VDD=3.0V, CPU in operating state Min. 1.00 Typ. - 0.1 Typ. - 0.2
Typ. 1.2 -4
2xVDD1 3xVDD1
Max. 1.4 Typ. + 0.1 Typ. + 0.2
Unit V mV/C V
Measuring Circuit
VDD1 Voltage VDD2 Voltage VDD3 Voltage Supply Current 1
-
2 7 15 35
5 12 30 50
1
A
Supply Current 2
IDD2
Notes:
The other electrical characteristics are the same as those for the 1.5V and 3.0V specifications.
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FEDL64P168-01 Semiconductor ML64P168
Power Supply Circuit
VDDI VDD C1 ML64P168 C2 VDD3 VDD2 VDD1 VSS ML64P168 1.5V Version VDDI VDD C1 ML64P168 C2 VDD3 VDD2 VDD1 VSS C12 CC CB CA
1.5V
CS C12 CC CB
CI
1.5V
2.7 to 5V
CS
CI
2.7 to 5V
ML64P168 1.5V Version (The LCD bias is regulated.) VDDI VDD C1 ML64P168 C2 VDD3 VDD2 VDD1 VSS ML64P168 3.0V Version VDDI VDD C1 ML64P168 C2 VDD3 VDD2 VDD1 VSS C12 CC CB CA
3.0V
CS C12 CC CA
CI
3.0V
CS
CI
ML64P168 3.0V Version (The LCD bias is regulated.) Note:CA,CB,CC,CS,CI,C12:0.1F +100% -50%
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FEDL64P168-01 Semiconductor ML64P168
PROM MODE
ABSOLUTE MAXIMUM RATINGS
(VSS = 0V) Parameter PROM power supply voltage Program voltage PROM input voltage PROM output voltage Storage temperature Symbol VCC VPP VI VO TSTG Condition VCC=VDD, Ta=25C Ta = 25C VCC system input, Ta=25C VCC system output, Ta=25C Rating -0.3 to + 6.7 -0.3 to + 14.0 -0.3 to VCC + 0.3 -0.3 to VCC + 0.3 -55 to + 150 Unit V V V V C
RECOMMENDED OPERATING CONDITIONS
(VSS = 0V) Parameter Operating Temperature VCC power supply voltage VPP power supply voltage Input voltage Symbol Top VCC VPP VIH VIL Condition VCC=VDD=VDDI In read In write VCC=VDD=VDDI Rating 0 to + 65 4.75 to 5.25 4.75 to 5.25 12.0 to 13.0 4 to VCC 0 to 1 Unit C V V V V V
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FEDL64P168-01 Semiconductor ML64P168
READ OPERATION ( PROM MODE )
DC Characteristics
(VDD=VPP=5.0V5%, Ta=25 5C unless otherwise specified ) Parameter VCC power supply current (standby) VCC power supply current (operation) Input voltage Symbol ICC1 ICC2 VIH VIL IOH IOL VCC = VDD VOH = VCC - 0.5V VOL = 0.5V VCC = VDD CE=VIH VCC = VDD CE=VIL VCC = VDD Condition Min. 4 0 -2.0 0.2 Typ. -0.7 0.7 Max. 35 100 VCC 1 -0.2 2.0 Unit mA mA
V V
mA mA
Output voltage
AC Characteristics
(VCC =5.0V5%, VPP=VCC, Ta=0 to 65C Parameter Symbol Condition Min. unless otherwise specified) Typ. Max. Unit
Address access time CE access time OE access time Output disable time
tACC tCE tOE tDF
OE=CE=VIL OE=VIL CE=VIL CE=VIL
0
-
120 120 50 40
ns ns ns ns
Measurement conditions: Input pulse level Input rise / fall time Timing judgement level Timing chart
0.45 to 4.55V 5ns Input 0.8V, 2V / Output 0.8V , 2V
Address Input
CE tCE OE tOE tACC Data output tDF
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FEDL64P168-01 Semiconductor ML64P168
WRITE OPERATION ( PROM MODE )
DC Characteristics
( VSS=0V, VDD=5.0V 5%, VPP=12.5V 5V, Ta=25 5C unless otherwise specified ) Parameter VPP power supply current VCC power supply current Input voltage Symbol IPP ICC VIH VIL IOH IOL VCC = VDD VOH = VCC - 0.5V VOL = 0.5V CE=VIL VCC = VDD VCC = VDD Condition Min. 4 0 -2.0 0.2 Typ. -0.7 0.7 Max. 50 100 VCC 1 -0.2 2.0 Unit mA mA
V V
mA mA
Output voltage
AC Characteristics
( VSS=0V, VDD=5.0V 5%, VPP=12.5 5V, Ta=25 5C Parameter Symbol Condition Min. unless otherwise specified ) Typ. Max. Unit
Address set-up time OE set-up time Data set-up time Address hold time Data hold time OE output floating delay time VPP power supply set-up time Initial program pulse width Additional program pulse width OE output effective delay time
tAS tOES tDS tAH tDH tDEP tVS tPW tOPW tOE
VDD=VDDI 6V 0.25V VDD1=VDD2 6V 0.25V -
2 2 2 0 2 0 2 0.95 2.85 -
1.0 -
130 1.05 78.75 150
s s s s s ns s ms ms ns
Measurement conditions: Input pulse level Input rise / fall time Timing judgement level
0.45 to 4.55V Less than 20ns Input 0.8V, 2V / Output 0.8V , 2V
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FEDL64P168-01 Semiconductor ML64P168
Program timing chart
Address Input tAS Data Input/Output tDS VPP tVS CE tPW tOPW OE Data Input tDH
Address N tAH Data Output tOE tDEP
tOES
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FEDL64P168-01 Semiconductor ML64P168
FUNCTIONAL DESCRIPTION
CPU Peripheral Function A/D converter ( ADC ) The ML64P168 has a built-in two-channel RC oscillation A/D converter. The A/D converter is composed of a two-cannel oscillation circuit, Counter A ( CNTA0-4, a 4.8-digit decade counter ), Counter B ( CNTB0-3, a 14-bit binary counter ), and A/D Converter Control Registers 0 and 1 ( ADCON0, ADCON1 ). By counting oscillation frequencies that vary depending on a resistor or capacitor connected to the RC oscillation circuit, the A/D converter converts resistance values or capacitance values to corresponding digital values. By using a thermistor or humidity sensor as a resistance, a thermometer or a hygrometer can be constructed. By applying a separate sensor to each cannel of the 2-channel RC oscillation circuit, it is also possible to extend measure ranges or measure at two places. Serial port ( SIOP ) The ML64P168 has an 8-bit synchronous serial port. Receive/transmit operation of the serial port is performed simultaneously and the serial transfer clock can select either internal or external mode. Direction of transfer data can be big endian or little endian. Each pin of the serial port is assigned as secondary functions of P3.3 and P4.0 to P4.2. Setting each bit of SIN,SOUT, SPR and SCLK of P33CON and P40CON to P42CON to "1" makes each pin valid. LCD driver ( LCD ) The ML64P168 has a built-in LCD driver for 34 outputs. The LCD driver consists of 31x 4-bit display registers ( DSPR0-30 ), the Display Control Register ( DSPCON ), a 34-output LCD driver circuit, and a bias generation circuit ( BIAS ). The bias generation circuit for LCD driver ( BIAS ) generates bias voltages for the LCD driver by rising or dropping the power supply voltage by externally installing capacitors. Alternatively, it generates bias voltages by rising the constant voltage ( VDD1 = 1.2V ) generated by the voltage regulator for LCD driver. Which way is to be used is specified by mask option. There are three types of driving methods: 1/4duty, 1/3duty and 1/2duty. Software selects the duty mode. A mask option can select either a common driver or a segment driver for each LCD driver pin. A mask option can also specify assignment of each bit of the display register to each segment. All the display registers must be selected by a mask option. L26 to L33 of the LCD driver can be configured to be output ports by a mask option. The relationship between the duty, the bias method, and the maximum segment number follows: 1/4duty, 1/3 bias method ----------- 120 segments 1/3duty, 1/3 bias method ----------- 93 segments 1/2duty, 1/2 bias method ----------- 64 segments Buzzer driver ( BD ) The ML64P168 has a built-in buzzer driver with 15 buzzer output frequencies and 4 buzzer output modes. Each buzzer output is selected by the Buzzer Control Register ( BDCON ) and the Buzzer Frequency Control Register ( BFCON ).
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FEDL64P168-01 Semiconductor ML64P168
Capture circuit ( CAPR ) The ML64P168 captures 32Hz to 256Hz output of the time base counter at the falling of Port 0.0 or Port 0.1 ( P0.0 or P0.1 ) to "L" level when the pull-up resistor input is chosen, or at the rising to "H" level when the pull-down resistor input is chosen. The capture circuit is composed of the Capture Control Register ( CAPCON ) and the Capture Registers ( CAPR0, CAPR1 ) that fetch output from the time base counter. Watchdog timer ( WDT ) The ML64P168 has a built-in watchdog timer to detect CPU malfunction. The watchdog timer is composed of a 6-bit watchdog timer counter ( WDTC ) to count a 16Hz output and a watchdog timer control register ( WDTCON ) to reset WDTC. Clock generation circuit ( 2CLK ) The clock generation circuit ( 2CLK ) in the ML64P168 contains a 32.768kHz crystal oscillation circuit, a 700kHz RC oscillation circuit, and a clock control port. This circuit generates the system clock ( CLK ) and the time base clock ( 32.768kHz ). The system clock drives the CPU while the time base clock drives the time base counter and the buzzer driver. Via the contents of the Frequency Control Register ( FCON ), the system clock can be switched between 32.768kHz ( the output of the crystal oscillation circuit ) and 700kHz ( the output of the RC oscillation circuit ). Note: The oscillation frequency of the RC oscillation circuit varies depending on the value of an external resistor ( ROS ), operating power supply voltage ( VDD ), and ambient temperatures (Ta). Time base counter ( TBC ) The ML64P168 has a built-in time base counter ( TBC ) that generates clocks to be supplied to internal peripheral circuit. The time base counter is composed of 15 binary counters, and a 1/10 frequency dividing circuit. The count clock of the time base is driven by the oscillation clock ( 32.768kHz ) of the crystal oscillation circuit. The output of the time base counter is used for the buzzer driver, the system reset circuit, the watchdog timer, the time base interrupt, the sampling clocks of each port, and the capture circuit. I/O port Input-output ports ( P2, P3, P4 ) : 3 ports x 4bits Pull-up ( pull-down ) resistor input or high-impedance input, CMOS output or NMOS open drain output: these can be specified for each bit; external 0 interrupt Input port ( P0 ) : 1 port x 4bits Pull-up ( pull-down ) resistor input or high-impedance input; external 1 interrupt Output port ( P1 ) : 1 port x 4bits CMOS output or NMOS open drain output
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FEDL64P168-01 Semiconductor ML64P168
Interrupt ( INTC ) The ML64P168 has 10 interrupt sources ( 10 vector address ), of which two are external interrupts from ports and eight are internal interrupts. Of the ten interrupt sources, only the watchdog timer interrupt cannot be disabled ( non-maskable interrupt ). The other nine interrupts are controlled by the master interrupt enable flag ( MI ) and the interrupt enable registers ( IE0, IE1, and IE2 ). When an interrupt condition is met, the CPU branches to a vector address corresponding to the interrupt source. Battery check circuit ( BC ) The battery check circuit ( BC ) detects the level of the supply voltage by comparing the voltage generated by an external supply-voltage dividing resistor ( RBLD ) with the internal reference voltage ( Vrb ).
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FEDL64P168-01
Semiconductor
LCD
ROS
L33
L0
OSC2 OSC1
32.768 kHz
C12 CC CB CS
APPLICATION CIRCUITS (1.5 V Spec. )
VDDI VDD C2 C1
CI 1.5V
CGEX VDD3 VDD2 VDD1 VSS VPP TST2 TST1 IN0 CS0 RS0 CRT0 RT0 IN1 CS1 RS1 RT1 BD
XT XT RESET P1.0 P1.1 P1.2 P1.3 P0.0 P0.1 P0.2
ML 64P168-xxxGA/GP ML 64P168-xxx (1.5V Spec.)
5V
P4.3 P4.2 P4.1 P4.0 P3.3 P3.1
P0.3
- 5V Interface - Temperature measurement by two thermistors - Battery check circuit is used. - CGEX of crystal oscillator : External
Switch matrix ( 4 x 4 )
RT1RS1CS1 RI1 RT0
RS0 CS0 RI0
1.5V Spec. Application Circuit ( Voltage Regulator for LCD Driver not Used )
Buzzer
RBLD
ML64P168
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FEDL64P168-01
Semiconductor
LCD
ROS
L33
L0
OSC2 OSC1
32.768 kHz
C12 CC CB CA CS 1.5V
CI 5V
CGEX
ML 64P168-xxxGA/GP (1.5V Spec.)
VDDI VDD C2 C1 VDD3 VDD2 VDD1 VSS VPP TST2 TST1
APPLICATION CIRCUITS (1.5 V Spec. ) ( continued )
XT XT RESET P1.0 P1.1 P1.2 P1.3 P0.0 P0.1 P0.2 P0.3 IN0 CS0 RS0 CRT0 RT0 P4.3 P4.2 P4.1 P4.0 P3.3 P3.1 IN1 CS1 RS1 RT1 BD
- 5V Interface - Temperature measurement by two thermistors - Battery check circuit is used. - CGEX of crystal oscillator : External
Switch matrix ( 4 x 4 )
RT1RS1CS1 RI1 RT0
RS0 CS0 RI0
1.5V Spec. Application Circuit ( Voltage Regulator for LCD Driver Used )
Buzzer
RBLD
ML64P168
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FEDL64P168-01
LCD
Semiconductor
ROS
L33
L0
OSC2 OSC1
32.768 kHz
C12 CC CA 3V CS CI 5V
APPLICATION CIRCUITS (3.0 V Spec. )
CGEX
ML 64P168-xxxGA/GP (3.0V Spec.)
VDDI VDD C2 C1 VDD3 VDD2 VDD1 VSS VPP TST2 TST1
XT XT RESET P1.0 P1.1 P1.2 P1.3 P0.0 P0.1 P0.2 P0.3 IN0 CS0 RS0 CRT0 RT0 P4.3 P4.2 P4.1 P4.0 P3.3 P3.1 IN1 CS1 RS1 RT1 BD
- 5V Interface - Temperature measurement by two thermistors - Battery check circuit is used. - CGEX of crystal oscillator : External
Switch matrix ( 4 x 4 )
RT1RS1 CS1 RI1 RT0
RS0 CS0 RI0
3.0V Spec. Application Circuit ( Voltage Regulator for LCD Driver not Used )
Buzzer OSC monitor SCLK To the serial communication interface SPR ( 5V ( VDDI ) system ) SOUT SIN
RBLD
ML64P168
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FEDL64P168-01
LCD
Semiconductor
ROS
L33
L0
OSC2 OSC1
32.768 kHz
C12 CC CB CA 3V CS CI 5V
CGEX
ML 64P168-xxxGA/GP (3.0V Spec.)
VDDI VDD C2 C1 VDD3 VDD2 VDD1 VSS VPP TST2 TST1
APPLICATION CIRCUITS (3.0 V Spec. ) ( continued )
XT XT RESET P1.0 P1.1 P1.2 P1.3 P0.0 P0.1 P0.2 P0.3 IN0 CS0 RS0 CRT0 RT0 P4.3 P4.2 P4.1 P4.0 P3.3 P3.1 IN1 CS1 RS1 RT1 BD
- 5V Interface - Temperature measurement by two thermistors - Battery check circuit is used. - CGEX of crystal oscillator : External
Switch matrix ( 4 x 4 )
RT1RS1 CS1 RI1 RT0
RS0 CS0 RI0
3.0V Spec. Application Circuit ( Voltage Regulator for LCD Driver Used )
Buzzer OSC monitor SCLK To the serial communication interface SPR ( 5V ( VDDI ) system ) SOUT SIN
RBLD
ML64P168
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FEDL64P168-01 Semiconductor ML64P168
PACKAGE DIMENSIONS ML64P168-XXXGP
25.00.2 20.00.2
64 41 40
0.170.05
0.12 1.0TYP.
65
SEATING PLANE 2.5TYP.
19.00.2
14.00.2
2.5MAX. 2.10.2
0.05~0.35
25 1 24
0.25
80
0~10 1.3TYP. 1.380.15
INDEX MARK
0.8TYP.
0.8
0.32 -0.07
+0.08
0.16 M
Figure C-1 80-Pin QFP:GP Package Dimension Diagram Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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FEDL64P168-01 Semiconductor ML64P168
PACKAGE DIMENSIONS ML64P168-XXXGA
60 61 41 40
0.170.05 0.83TYP.
0.10
SEATING PLANE
16.80.2 14.00.1
1.40.2 2.4MAX. 2.10.2
80 1 20
0~0.25
0.25
21
0~10 0.6TYP. 0.670.15
INDEX MARK
0.83TYP.
0.65
0.32 -0.07
+0.08
0.13 M
Figure C-2 80-Pin QFP:GA Package Dimension Diagram Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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